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Vue d'ensemble

Génie électrique : Minimization and synthesis of combinational logic and finite state machines.Synthesis of synchronous and asynchronous sequential circuits. Principles of control design. Basic concepts in design for testability. Laboratory experiments involve the design and testing of FPGA based digital systems using CAD software and hardware description languages.

Trimestres : Automne 2015, Hiver 2016

Chargés de cours : Clark, James J; Gross, Warren (Fall) Gross, Warren; Ferrie, Frank P (Winter)

• (3-6-6)

• Prerequisites: CCOM 206 or EDEC 206, ECSE 211, ECSE 221, ECSE 291

• Tutorials and lab hours assigned by instructor.